verilog

212 Questions
Newest Active Unanswered Frequent
Score
View
Card Compact
How do you select a range of bits from an expression of registers?
user_163519330
•
3
2
871
xilinx-ise verilog
ALU NOOP case infers a latch: Is this OK?
user_21159710
•
3
1
55
alu hdl verilog
Mix of blocking and non-blocking assignments error
user_163519330
•
2
1
152
xilinx-ise verilog
Error compiling code due to direction declaration
user_65249450
•
2
1
260
iverilog verilog
Understanding the difference between overflow and carry flags
user_21159710
•
2
1
1466
alu signed-overflow carryflag verilog cpu-architecture
Getting an error using parameter in Verilog
user_168525210
•
2
2
151
test-bench verilog
How to represent 45 degree and 26.565 degree angle in 32 bit binary form?
user_114142270
•
2
1
151
cordic vivado system-verilog verilog fft
Shift register, connecting wired inputs to internal register
user_142643120
•
1
2
82
verilog
Verilog Global Variable Usage
user_166914870
•
1
2
454
verilog
Efficient assign to all elements of a packed type
user_15102110
•
1
1
47
verilog
Hot Questions