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cpu-architecture
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Is it possible to get the native CPU size of an integer in Rust?
user_1526155
0
•
asked May 23, 2020
8
2
601
rust
bigint
cpu-architecture
optimization
Kernel mode for user program
user_12071146
0
•
asked May 23, 2020
2
2
911
kernel-mode
instruction-set
kernel
processor
cpu-architecture
volatile increments with false sharing run slower in release than in debug when 2 threads are sharing the same physical core
user_10851291
0
•
asked May 20, 2020
3
2
124
false-sharing
x86
cpu-architecture
c++
performance
Is Little Man Computer still relevant?
user_13427221
0
•
asked May 12, 2020
2
2
691
little-man-computer
simulation
hardware
assembly
cpu-architecture
Why any modern x86 masks shift count to the 5 low bits in CL
user_3197420
0
•
asked May 12, 2020
4
4
1083
bit-shift
cpu-registers
x86
assembly
cpu-architecture
Do any CPU architectures use Metadata?
user_11392526
0
•
asked May 9, 2020
5
2
201
cpu-architecture
Does this prefetch256() function offer any protection against cache timing attacks on AES?
user_12281027
0
•
asked May 9, 2020
7
1
175
timing-attack
volatile
cpu-cache
cpu-architecture
c
Why does false sharing still affect non atomics, but much less than atomics?
user_2945027
0
•
asked May 8, 2020
3
1
266
false-sharing
cpu-cache
x86
cpu-architecture
c++
Are two store buffer entries needed for split line/page stores on recent Intel?
user_149138
0
•
asked Apr 13, 2020
9
0
170
micro-architecture
micro-optimization
intel
x86
cpu-architecture
Is TLB inclusive?
user_8990329
0
•
asked Apr 12, 2020
2
1
528
tlb
x86
assembly
cpu-architecture
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