cpu-cache

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Multicopy atomicity vs Cache Coherence
user_85211770
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memory-model atomic cpu-cache cpu-architecture caching
Using CPUID to get cache size in Ryzen CPU
user_17543220
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4
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91
cpuid amd-processor x86-64 cpu-cache assembly
Program with intentionally high L1 cache miss rate
user_134844160
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5
2
88
cpu-cache intel linux c
Strange behaviour during multiprocess calls to numpy conjugate
user_170880670
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5
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108
python-multiprocessing cpu-cache numpy multiprocessing python
What's the actual behavior of L3 cache coherency across NUMA nodes in Intel CPU?
user_135549860
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1
0
82
numa perf cpu-cache intel x86
Can all of L2/L3 cache be used by data? If so, why does the Graviton 3 bandwidth plot drop off after half the L2/L3 size, but only gradually?
user_19371970
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2
2
96
memory-bandwidth arm64 cpu-cache cpu-architecture performance
Is there a special benefit to consuming whole cache lines between iterations of a loop?
user_82179190
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10
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129
simd cpu-cache cpu-architecture visual-c++ c++
How can I flush all caches on a PowerPC board?
user_72180620
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2
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47
powerpc cpu-cache assembly linux-kernel caching
Reasons for seeing an assembly push operand is the bottleneck
user_46848960
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6
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84
cpu-registers cpu-cache assembly c c++
Should the cache padding size of x86-64 be 128 bytes?
user_142585170
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12
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623
false-sharing rust x86-64 cpu-cache c++
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