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How do I get GCC to put a char in ah/bh/ch/dh?
user_7509065
0
•
asked May 10, 2020
11
1
209
inline-assembly
x86
assembly
gcc
c
Why does false sharing still affect non atomics, but much less than atomics?
user_2945027
0
•
asked May 8, 2020
3
1
266
false-sharing
cpu-cache
x86
cpu-architecture
c++
Offset before square bracket in x86 intel asm on GCC
user_2251364
0
•
asked May 7, 2020
3
1
473
gnu-assembler
intel-syntax
x86
assembly
gcc
C++ latency increases when memory ordering is relaxed
user_997112
0
•
asked May 7, 2020
4
1
573
memory-barriers
x86
c++11
c++
performance
Are two store buffer entries needed for split line/page stores on recent Intel?
user_149138
0
•
asked Apr 13, 2020
9
0
170
micro-architecture
micro-optimization
intel
x86
cpu-architecture
Absolute value without branching or shifts, only add/sub and booleans
user_13296687
0
•
asked Apr 12, 2020
2
2
826
absolute-value
bit-manipulation
x86
assembly
Is TLB inclusive?
user_8990329
0
•
asked Apr 12, 2020
2
1
528
tlb
x86
assembly
cpu-architecture
Converting a loop from x86 assembly to C language with AND, OR, SHR and SHL instructions and an array
user_12448016
0
•
asked Apr 11, 2020
2
2
276
nasm
x86
reverse-engineering
assembly
c
Short jump forwards and backwards
user_13002483
0
•
asked Apr 10, 2020
2
0
25
x86
assembly
How do the store buffer and Line Fill Buffer interact with each other?
user_582010
0
•
asked Apr 9, 2020
7
2
2997
cpu-mds
micro-architecture
cpu-cache
x86
cpu-architecture
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