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When use write-through cache policy for pages
user_582010
0
•
asked Apr 9, 2020
3
1
1438
page-tables
cpu-cache
x86
linux-kernel
cpu-architecture
First member of struct not visible in VS debugger
user_12382089
0
•
asked Apr 9, 2020
3
1
103
masm
visual-studio-debugging
x86
assembly
visual-studio
OFFSET keyword for printing numbers in masm
user_13247822
0
•
asked Apr 7, 2020
3
1
391
masm
inline-assembly
x86
assembly
Difficulty understanding logic in disassembled binary bomb phase 3
user_13244127
0
•
asked Apr 7, 2020
8
2
873
att
x86
reverse-engineering
assembly
c
Why is mov turing complete?
user_8025936
0
•
asked Apr 5, 2020
24
2
9153
mov
computer-science
turing-complete
x86
assembly
Understanding how the copying of the compressed Linux kernel works in head_64.S
user_5454400
0
•
asked Apr 4, 2020
2
0
78
x86
assembly
linux-kernel
linux
Why does FLD m80fp not raise an exception for SNaN inputs while FLD of double or float can?
user_12036901
0
•
asked Apr 4, 2020
2
1
110
x87
floating-point
x86
assembly
Why can GCC only do loop interchange optimization when the int size is a compile-time constant?
user_3358251
0
•
asked Apr 3, 2020
3
1
564
compiler-optimization
x86
gcc
optimization
c
32-byte aligned routine does not fit the uops cache
user_2786156
0
•
asked Apr 3, 2020
7
2
742
intel
x86
assembly
cpu-architecture
performance
Does AMD support x2APIC?
user_8205705
0
•
asked Apr 3, 2020
2
1
1487
apic
amd-processor
osdev
x86
cpu
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