cpu-architecture

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Why does this function run so much faster when it makes an extra read of memory?
user_118758450
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16
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332
x86-64 clang assembly cpu-architecture performance
Where is the architecture support implemented in GCC, clang, and/or LLVM in terms of machine code?
user_1699920
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2
2
308
machine-code cpu-architecture gcc compiler-construction
Why is this jump instruction so expensive when performing pointer chasing?
user_65735100
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3
1
233
perf pointers x86 assembly cpu-architecture
Understanding factors in latency bounded memcpy/memset x86_64
user_113221310
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2
0
159
memory-bandwidth memcpy x86-64 intel cpu-architecture
Does 8086 initiate a 1-byte code fetch when there's only 1 byte left in the prefetch queue?
user_140682320
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3
1
235
x86-16 x86 cpu-architecture
How is this a guarantee a value has been atomically updated in ARM?
user_12509840
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2
1
324
load-link-store-conditional arm atomic assembly cpu-architecture
On x86-64, is the “movnti” or "movntdq" instruction atomic when system crash?
user_148836760
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5
1
521
persistent-memory x86-64 atomic sse cpu-architecture
How does kernel know physical memory base address?
user_53581910
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3
2
1733
ram kernel linux-kernel cpu-architecture linux
Does a Length-Changing Prefix (LCP) incur a stall on a simple x86_64 instruction?
user_46035070
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4
1
399
x86-64 micro-optimization assembly cpu-architecture performance
How does cache coherence work when there are multiple levels of private caches and then shared memory?
user_105167040
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2
1
167
cpu-cache cpu-architecture cpu caching
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