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_mm_max_ss has different behavior between clang and gcc
user_2325752
0
•
asked Mar 9, 2021
6
1
237
clang
sse
x86
gcc
c++
How to inline-assembly with Clang 11, intel syntax and substitution variables
user_3161139
0
•
asked Mar 8, 2021
2
1
4681
inline-assembly
clang
intel-syntax
x86
Count integers in [1..N] with K zero bits below the leading 1? (popcount for a contiguous range without HW POPCNT)
user_13293614
0
•
asked Mar 7, 2021
2
2
560
hammingweight
nasm
micro-optimization
x86
optimization
Why does `native_write_msr` dominate my profiling result?
user_9565109
0
•
asked Mar 7, 2021
5
1
404
perf
x86
linux-kernel
profiling
Finding the number of bytes of entered string at runtime
user_3836426
0
•
asked Mar 4, 2021
2
1
165
system-calls
x86
assembly
linux
Understanding micro-architectural causes for longer code to execute 4x faster (AMD Zen 2 architecture)
user_393756
0
•
asked Mar 2, 2021
4
1
112
amd-processor
x86
assembly
cpu-architecture
c++
How qemu works under the hood when I execute int 0x10?
user_976311
0
•
asked Feb 26, 2021
2
0
205
kvm
qemu
x86
assembly
Why the clock interrupt never works in the middle of process?
user_15023994
0
•
asked Feb 25, 2021
2
1
229
osdev
interrupt
x86
assembly
c
In which conditions the L1 IP-based stride prefetcher will be triggered?
user_15256255
0
•
asked Feb 24, 2021
7
0
194
micro-architecture
prefetch
cpu-cache
intel
x86
Why don't wider versions of VDPPD / VDPPS exist, like 512-bit bit?
user_5895988
0
•
asked Feb 23, 2021
2
1
237
avx512
avx
simd
x86
assembly
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