cpu-architecture

399 Questions
Newest Active Unanswered Frequent
Score
View
Card Compact
RISC-V SiFive HiFive Unleashed FMADD(32) underflow flag not setting on subnormal result
Mateusz_Kowalski_121529360
•
4
1
189
riscv ieee-754 floating-point assembly cpu-architecture
what would the system software have to do if the processor did not generate interrupts?
user_120348440
•
4
2
574
interrupt operating-system assembly cpu-architecture
Who Decides Between I/O Mapped and Memory Mapped I/O (x86)
user_92120560
•
8
2
2476
x86 assembly cpu-architecture
Demo processor rings - assembly code that runs ring 0 instructions
user_96863800
•
3
1
634
linux-device-driver assembly cpu-architecture
Temporal locality in memory mountain
user_28752100
•
3
1
910
cpu-cache intel x86 cpu-architecture performance
Docker and -march native
user_92925470
•
2
1
1891
avx docker x86-64 cpu-architecture gcc
Question About x86 I/O Port Addresses and IN/OUT Instructions
user_92120560
•
8
1
2145
x86 assembly cpu-architecture io
How does MIPS I handle branching on the previous ALU instruction without stalling?
user_2241320
•
8
2
1156
mips pipeline assembly cpu-architecture
Are there any modern CPUs where a cached byte store is actually slower than a word store?
user_2241320
•
10
2
864
arm cpu-cache x86 cpu-architecture performance
What level of the cache does PREFETCHT2 fetch into?
user_1491380
•
4
0
289
amd-processor cpu-cache intel x86 cpu-architecture
Hot Questions