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Willingly introducing a race condition on a 64-bit pointer value
user_1453047
0
•
asked Oct 18, 2019
7
0
164
undefined-behavior
x86
race-condition
multithreading
c++
Understanding the concept of STDCALL vs CDECL with EBP and ESP cleanup
user_12191253
0
•
asked Oct 18, 2019
2
1
695
stdcall
calling-convention
callstack
x86
assembly
Why can _mm_pause() significantly improve performance?
user_508343
0
•
asked Oct 17, 2019
7
0
1905
lockless
x86
assembly
cpu-architecture
performance
Do FP and integer division compete for the same throughput resources on x86 CPUs?
user_224132
0
•
asked Oct 16, 2019
7
1
435
intel
x86
assembly
cpu-architecture
performance
How many ways-superscalar are modern Intel processors?
user_5810747
0
•
asked Oct 16, 2019
5
1
1898
micro-architecture
intel
x86
cpu-architecture
Accidental overwrite of general register
user_4879593
0
•
asked Oct 15, 2019
2
1
80
att
x86
assembly
Low performance with CLWB (cacheline write-backs) to same location vs. cycling through a few lines
user_2212968
0
•
asked Oct 11, 2019
5
1
341
intel
x86
memory
c++
performance
Error running any script in Full System Simulation(gem5)
user_12026779
0
•
asked Oct 10, 2019
2
1
849
gem5
x86
How to find def-use chains at the machine-level in LLVM backend
user_5434581
0
•
asked Oct 10, 2019
2
1
296
llvm
x86
c++
Run asm in Visual Studio code
Admin
1
•
asked Oct 6, 2019
7
1
15568
visual-studio-code
att
x86
assembly
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