How to find def-use chains at the machine-level in LLVM backend

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I am new at working in LLVM backend. I have a X86 pass that I mark some machine instructions and then I want to find data dependent instructions of the marked instructions. By data dependent, I mean users of the instructions (like def-use chains). For doing this at IR-level, I used to use a code like this:

for (auto it = marked_instructions.begin(), eit = marked_instructions.end(); it != eit; it++)
{
    for (User *U : (*it)->users())
    {
        if (Instruction *Inst = dyn_cast<Instruction>(U))
        {
            dependent_instructions.insert(Inst);
        }
    }
}

Now, I want to do the same thing at the backend and with MachineInstrs. Also, my pass currently takes place after register allocation. However, there is no constraint for doing it before register allocation, if it's easier to find the def-use chains before register allocation.

Thanks

llvm x86 c++
1 Answers

I think, maybe, MachineRegisterInfo::getRegUseDefListHead(RegNo) might meet your need.

e.g.

For some MachineInstr *MI: 

    for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
         const MachineOperand &MO = MI->getOperand(i);
         if (MO.isReg() && MO.isDef()) {
         unsigned Reg = MO.getReg();
         MachineOperand * mopr = getRegUseDefListHead(Reg);
         ....
    ....

Refer to lang-ref-llvm for details.

user_42946990
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