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Parallel simd MUCH slower than serial simd in Julia
user_6314221
0
•
asked Jun 23, 2022
3
0
101
sundials
ode
julia
simd
parallel-processing
Is there a special benefit to consuming whole cache lines between iterations of a loop?
user_8217919
0
•
asked Jun 19, 2022
10
0
129
simd
cpu-cache
cpu-architecture
visual-c++
c++
is fcvtzs d0,d0 really an AArch64 SIMD instruction?
user_2207776
0
•
asked Jun 16, 2022
2
1
80
arm64
instructions
instruction-set
simd
assembly
Why does MOVD/MOVQ between GP and SIMD registers have quite high latency?
user_17665807
0
•
asked Jun 10, 2022
3
1
113
simd
sse
x86
assembly
cpu-architecture
Are the xgetbv and CPUID checks sufficient to guarantee AVX2 support?
user_3154996
0
•
asked Jun 6, 2022
2
1
225
avx2
x86-64
simd
x86
Is vfmadd132pd slow on AMD Zen 3 architecture?
user_1015236
0
•
asked Jun 4, 2022
4
3
112
dot-product
amd-processor
avx2
simd
c#
Best way to mask a single bit in AVX2?
user_17665807
0
•
asked May 29, 2022
3
3
158
avx
avx2
simd
x86
c
Are there any problems for which SIMD outperforms Cray-style vectors?
user_45843
0
•
asked May 29, 2022
3
2
126
vectorization
instruction-set
simd
cpu-architecture
Why does SIMD have single data instructions when it's called SIMD?
user_6784916
0
•
asked May 27, 2022
4
1
153
avx
simd
sse
cpu-registers
cpu-architecture
Rust-SIMD hello world
user_3853711
0
•
asked May 26, 2022
1
1
211
rust-cargo
rust
simd
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