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avx2
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AVX2/VCL : static/dynamic lane scheduling
user_5973309
0
•
asked Sep 12, 2022
1
0
77
vector-class-library
avx2
simd
sse
c++
Efficient transpose of 2D nibble matrix?
user_10176495
0
•
asked Aug 22, 2022
3
1
127
avx2
simd
bit-manipulation
sse
c
Is uops.info wrong about vinserti128?
user_3154996
0
•
asked Jul 25, 2022
4
1
85
avx2
simd
x86
assembly
cpu-architecture
Why don't gcc/clang vectorize 128-bit SIMD intrinsics into 256-bit when possible?
user_3154996
0
•
asked Jul 23, 2022
1
1
103
avx2
intrinsics
clang
x86
gcc
Why is masking needed before using a pshufb shuffle as a lookup table for nibbles?
user_19039633
0
•
asked Jul 14, 2022
2
1
103
avx
avx2
simd
sse
c++
Horizontal min on avx2 8 float register and shuffle paired registers alongside
user_4614366
0
•
asked Jul 4, 2022
2
1
124
avx
avx2
simd
sse
c++
Can't get vectorclass library to compile to AVX2 instructions in MSVC2019
user_19314349
0
•
asked Jun 13, 2022
1
0
28
vector-class-library
avx2
visual-c++
Are the xgetbv and CPUID checks sufficient to guarantee AVX2 support?
user_3154996
0
•
asked Jun 6, 2022
2
1
225
avx2
x86-64
simd
x86
Is vfmadd132pd slow on AMD Zen 3 architecture?
user_1015236
0
•
asked Jun 4, 2022
4
3
112
dot-product
amd-processor
avx2
simd
c#
How to set all the values in AVX ymm register to be the same (all are 0/1/specific value)?
user_15645807
0
•
asked Jun 3, 2022
1
1
155
avx
avx2
cpu-registers
assembly
1
(current)
2
3
4
5
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