Is there an existing function within the regular std.logic library to convert a boolean data type to std logic in vhdl?
1 Answers
The answer in short: no.
As @Harry pointed out, it isn't possible to map 2 values from boolean to 9 values from std_logic.
The std_logic-type is used, among other things, to detect problems in your code whilst simulating and to have a better representation how the hardware will act later on.
So I would recommend you to not write a function which converts true to '1' and false to '0', because then you'll lose the advantage of the std_logic-type.
It is noted, that converting from std_logic to boolean is allowed and even implemented since the VHDL 2008 standard.
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