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Calling an assembly language function causes "floating point stack check" exception
user_999355
0
•
asked Sep 10, 2018
6
1
320
x86
assembly
delphi
how is CPU physical address space mapped to physical DRAM?
user_10250994
0
•
asked Sep 10, 2018
6
1
1942
mmu
memory-address
x86
memory
cpu-architecture
Why does Linux perf use event l1d.replacement for "L1 dcache misses" on x86?
user_149138
0
•
asked Sep 4, 2018
7
0
880
intel-pmu
perf
x86
profiling
linux
Hardware cache events and perf
user_149138
0
•
asked Sep 4, 2018
7
1
2551
intel-pmu
perf
x86
linux
performance
What's up with the "half fence" behavior of rdtscp?
user_149138
0
•
asked Sep 4, 2018
7
0
415
rdtsc
microbenchmark
x86
assembly
performance
Choice between aligned vs. unaligned x86 SIMD instructions
user_3170929
0
•
asked Sep 3, 2018
20
2
4609
avx512
avx
simd
sse
x86
Why is icc generating weird assembly for a simple main?
user_700825
0
•
asked Sep 3, 2018
3
1
316
icc
code-generation
x86
assembly
c++
Is `reinterpret_cast`ing between hardware SIMD vector pointer and the corresponding type an undefined behavior?
user_6370128
0
•
asked Aug 31, 2018
7
2
1676
intrinsics
undefined-behavior
language-lawyer
x86
c++
How to efficiently convert an 8-bit bitmap to array of 0/1 integers with x86 SIMD
user_3410010
0
•
asked Aug 30, 2018
4
2
1054
avx2
simd
bit-manipulation
sse
x86
Memory latency measurement with time stamp counter
user_859227
0
•
asked Aug 29, 2018
3
2
1303
tsc
x86
cpu-architecture
c
performance
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