intel-pmu

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Read PMU counters using wrmsrl and rdmsrl
user_41738670
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3
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68
msr intel-pmu kernel-module linux-kernel c
Are the event ratios in Appendix B.8 of Intel's Optimization Reference Manual applicable to other microarchitectures?
user_65735100
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1
0
23
intel-pmu x86 performance
PMU x86-64 performance counters not showing in perf under AWS
Admin1
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3
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466
intel-pmu amazon-web-services amazon-ec2 performancecounter linux-kernel
Performance Counter for DRAM Per-Rank Memory Access
user_66610260
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3
1
443
intel-pmu perf energy memory-access performancecounter
Difference Between mem_load_uops_retired.l3_miss and offcore_response.demand_data_rd.l3_miss.local_dram Events
user_66610260
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3
1
224
intel-pmu perf memory-access performancecounter intel
PMC to count if software prefetch hit L1 cache
user_113221310
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3
1
270
intel-pmu memory-barriers x86-64 performancecounter intel
Profiling Cache hit rate of a function of C program
user_23384420
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3
3
1074
papi intel-pmu perf linux c
How to use rdpmc instruction for counting L1d cache miss?
user_44605140
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3
1
791
intel-pmu perf x86 assembly
Why "setne %al" used "a lot of cycles" in perf annotation?
user_53192280
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2
1
350
intel-pmu perf intel x86 assembly
Using the perf events from perf list programatically
user_1491380
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3
1
530
intel-pmu perf linux performance
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