x86

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Why would the IRET instruction increment EIP by 4?
user_83245850
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2
1
94
i386 interrupt x86 cpu-architecture
Why is movl preferred to movb when translating a C downcast from unsigned int to unsigned char?
user_93735090
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14
2
826
micro-optimization x86 assembly gcc c
Translate formula DELTA = B^2 - 4AC to an assembly language program
user_139515920
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1
1
99
x86 assembly winapi
GCC wrongly optimizes a pointer-equality test for a variable at a custom address
user_108664780
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6
4
223
x86-64 x86 gcc optimization c
Why can't debug native code on x86 instruction set Android Emulator?
user_163874000
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2
0
178
android-emulator x86 reverse-engineering assembly android
Assembler division x86 strange numbers
user_164347150
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3
0
79
x86 assembly c++
Differences between AVX and AVX2
user_129152120
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2
1
2175
avx avx2 matrix-multiplication simd x86
Why does GCC insist on not using xmm registers for an XOR?
user_117449160
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3
0
183
compiler-optimization sse x86 gcc c++
What happens if we request multibyte data at the end of memory address?
user_163509090
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2
1
63
real-mode protected-mode x86 assembly memory-management
Calculating JMP instruction's address for trampoline hook
user_163221420
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3
1
399
memory-address x86 assembly c c++
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