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What is the floating-point (__m256d) version of the non-temporal streaming load intrinsic (_mm256_stream_load_si256)?
user_1915854
0
•
asked Jul 4, 2017
6
1
934
avx2
intrinsics
simd
x86
c++
Docker ubuntu 16.04 container 64-bit run 32-bit applications
user_362754
0
•
asked Jul 4, 2017
4
0
2434
docker
x86
ubuntu
How does the CPU distinguish 'CALL rel16' (E8 cw) and 'CALL rel32' (E8 cd)?
user_1020139
0
•
asked Jul 3, 2017
13
1
920
instruction-set
x86
assembly
Can an instruction be in two addressing modes at the same time?
user_8240761
0
•
asked Jul 1, 2017
5
2
611
addressing-mode
x86
assembly
How many bytes do RESB, RESW, RESD, RESQ allocate in NASM?
user_8240761
0
•
asked Jul 1, 2017
17
1
40944
nasm
x86
assembly
Where are the stacks for the other threads located in a process virtual address space?
user_4396948
0
•
asked Jul 1, 2017
16
1
6069
virtual-address-space
stack-memory
x86
assembly
linux
How to know if an assembly code has particular syntax (emu8086, NASM, TASM, ...)?
Admin
1
•
asked Jun 30, 2017
5
2
1934
tasm
att
intel-syntax
x86
assembly
How to extract 8 integers from a 256 vector using intel intrinsics?
user_8204704
0
•
asked Jun 30, 2017
6
1
1695
avx
intrinsics
simd
x86
c
Fallback implementation for conflict detection in AVX2
user_2688641
0
•
asked Jun 30, 2017
11
1
717
avx512
avx2
intrinsics
x86
c++
How does the NEG instruction affect the flags on x86?
user_1455016
0
•
asked Jun 30, 2017
12
1
4898
negation
twos-complement
intel
x86
assembly
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