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XNOR two 64 bits registers in 8 bit blocks
user_15324525
0
•
asked Mar 3, 2021
5
1
148
x86-64
simd
bit-manipulation
assembly
Xcode in release mode fails to compile <immintrin.h> - complains about __builtin_ia32_emms()
user_15320331
0
•
asked Mar 3, 2021
2
1
1454
intrinsics
x86-64
simd
xcode
c++
In x86_64, does a 32-bit cmov clear the top bits if the condition is false?
user_3096774
0
•
asked Mar 1, 2021
3
1
300
x86-64
assembly
Why does Clang generate different code for reference and non-null pointer arguments?
user_5670773
0
•
asked Feb 21, 2021
10
2
323
language-lawyer
x86-64
clang
pass-by-reference
c++
Why am I seeing more RFO (Read For Ownership) requests using REP MOVSB than with vmovdqa
user_11322131
0
•
asked Feb 19, 2021
6
0
450
memcpy
x86-64
micro-optimization
intel
cpu-architecture
Why can't GCC generate an optimal operator== for a struct of two int32s?
user_874660
0
•
asked Feb 18, 2021
87
3
4832
compiler-optimization
x86-64
micro-optimization
gcc
c++
How do I compile the msm android kernel using the AOSP toolchain?
user_6413106
0
•
asked Feb 18, 2021
3
0
1335
android-kernel
android-source
x86-64
linux-kernel
android
Storing register values from a hook in assembly/c++ and save to array
user_14711789
0
•
asked Feb 16, 2021
2
0
173
x86-64
inline-assembly
hook
visual-c++
c++
Why does does a NOP (as a 5th uop) speed up a 4 uop loop on Ice Lake?
user_11322131
0
•
asked Feb 12, 2021
10
0
281
x86-64
micro-optimization
assembly
cpu-architecture
Does glibc (GNU C Library) provide a way to obtain the size of an allocated memory block?
user_1783163
0
•
asked Feb 11, 2021
6
1
375
x86-64
malloc
glibc
linux
c
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