sse

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On uint64 to double conversion: Why is the code simpler after a shift right by 1?
user_139816720
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9
2
138
floating-point-conversion x86-64 sse assembly c++
Horizontal min on avx2 8 float register and shuffle paired registers alongside
user_46143660
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2
1
124
avx avx2 simd sse c++
_mm_loadu_si32 not recognized by GCC on Ubuntu
user_141108390
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2
1
108
intrinsics sse gcc c
In JWASM/MASM - pshufw produces Error A2030: Instruction or register not accepted in current CPU mode
user_99934130
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4
1
113
mmx masm sse x86 assembly
Why does MOVD/MOVQ between GP and SIMD registers have quite high latency?
user_176658070
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3
1
113
simd sse x86 assembly cpu-architecture
Does RSQRTSS break the dependency on the destination register?
user_176658070
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4
1
93
sse x86 assembly cpu-architecture
Why does SIMD have single data instructions when it's called SIMD?
user_67849160
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4
1
153
avx simd sse cpu-registers cpu-architecture
Use "arithmetic shift right" as "less than zero"
user_119208920
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2
0
53
avx avx2 sse floating-point cpu-architecture
Why does SSE/AVX lack loading an immediate value?
user_176658070
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5
0
124
immediate-operand instruction-set sse x86 assembly
How to make use of SIMD capability for sum of squared differences between 8-bit components of RGBA pixels?
user_181053130
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2
1
155
avx intrinsics simd sse c++
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