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In JWASM/MASM - pshufw produces Error A2030: Instruction or register not accepted in current CPU mode
user_99934130
• asked Jun 19, 2022
4
1
113
mmx masm sse x86 assembly
What instruction set does SFENCE belong to?
user_81899580
• asked Mar 3, 2022
3
1
88
mmx amd-processor x86-64 sse assembly
What are the names and meanings of the intrinsic vector element types, like epi64x or pi32?
user_71302730
• asked Jan 30, 2022
2
1
181
mmx intrinsics sse2 sse intel
MMX intrinsics like _mm_cvtpd_pi32 not found with MSVC 2019 for 64bit targets; change from 2013?
user_33824860
• asked Mar 30, 2020
7
1
678
mmx visual-studio-2019 intrinsics x86-64 visual-c++
Is there a way to subtract packed unsigned doublewords, saturated, on x86, using MMX/SSE?
user_73471210
• asked Jun 10, 2019
5
1
349
mmx saturation-arithmetic sse x86 assembly
Calculate f(x)=2*(x^2)+5 with saturation using MMX instruction set for 128 numbers with size of 2 bytes loaded from a binary file
user_57983280
• asked Jan 17, 2019
2
2
347
mmx nasm x86-64 assembly
difference between MMX and XMM register?
user_55811820
• asked Jun 1, 2017
34
1
25928
mmx x86-64 sse x86 assembly
  • 1 (current)
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