osdev

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PCI I/O BAR Addresses - 32-bit or 16-bit?
user_72753900
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2
1
289
base-address pci osdev x86
"hlt"-instruction ignored/skipped in my x86_64 boot code (when I test it in QEMU)
user_28915950
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1
1
131
osdev qemu x86
Is the address checked by the memory alignment check mechanism a effective address, a linear address or a physical address?
user_162422780
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7
1
299
memory-segmentation osdev memory-alignment x86 assembly
Understand IDTR register?
Admin1
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3
1
603
interrupt-handling osdev x86-64 operating-system
How to switch from 32-bit to PAE paging directly?
user_118194690
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3
2
243
page-tables osdev paging x86 assembly
Rust gnu-asm, far jump in real mode
user_57600730
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2
0
67
gdt rust osdev gnu-assembler assembly
x86-64 Kernel crashing on setting up the IDT
user_144189410
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3
1
132
osdev nasm x86-64 assembly c
Will a keypress on a HID USB device (like a keyboard) trigger an Event in the Event Ring thus triggering an interrupt?
user_126637440
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3
0
346
osdev usb operating-system x86
Unable to page/access memory over 2 MiB. Osdev
user_121966640
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1
1
179
osdev x86-64 paging c
How does MSI-X triggers interrupt handlers? Is there a need to poll the chosen memory address?
user_126637440
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3
1
1046
apic pci osdev interrupt x86
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