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I can't understand this image which explain IDTR in intel X86-64 processor.
IDT base adress size is 64 and I totally get that since it can be nearly anywhere in memory.
But, why IDT limit is 16 bits? why we need all of these bits?
each vector is of size 16 and there are 256 vector so the maximum addition I need to represent is 16*256=4096 which can be done in 12 bits not 16.
First, keep in mind that this mechanism dates back to the 32-bit 80386, where lidt would load a 32-bit base and 16-bit limit.
I think there are two reasons for using a 16-bit limit even though 12 bits would suffice:
lidt takes a base/limit pair in the same format as lgdt (indeed the two instructions are documented on the same page in Intel manuals). And lgdt really did need a 16-bit limit, since the global descriptor table could be up to 64 Kbytes, corresponding to 8K entries of 8 bytes each (again for the 32-bit machine). This number was clearly chosen so that a 16-bit selector, corresponding to the 8086's 16-bit segment registers, could be used as a byte index into the GDT, after masking off its low 3 bits which were used to select between LDT/GDT and specify the requestor privilege level.
Using the same format for both instructions probably allowed them to share microcode between them, slightly reducing the 80386's cost and complexity.
Since the smallest addressable unit is the byte, saving 4 bits is rather pointless, because there's no easy way to use half a byte for something else. I suppose Intel could have said the high 4 bits of the limit field were reserved, and maybe thought of some other use for them in later CPUs (e.g. to enable new interrupt-handling features), but, well, they didn't.
