Top Questions

1. Is the address checked by the memory alignment check mechanism a effective address, a linear address or a physical address?
   7 votes

   1 answers
2. Will CPU in 64-bit mode executing a call or ret instruction check the segment limit of the stack segment?
   3 votes

   0 answers
3. Masked and unmasked FP exceptions in the same instruction: are all bits set in MXCSR before handling the unmasked exception?
   2 votes

   0 answers
4. Will an implicit stack switch occur when switching from compatibility mode to 64-bit mode at the same privilege level?
   2 votes

   3 answers
5. Is it possible to access 4GB memory in v86 mode through the iret instruction?
   2 votes

   0 answers