chisel

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Why does sbt fail with "Expected ';'"?
user_141125000
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7
2
1070
chisel sbt
Creating IO bundles using dynamic parameters in chisel using MixedVec
user_121979610
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2
1
325
chisel scala
Creating Modules in chisel dynamically and at the same time passing dynamic parameters to those modules
user_121979610
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2
2
297
chisel scala
Chisel3: Vec indexWhere expected Bool, actual Any
user_140177600
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4
1
186
chisel
How to call the variable defined inside withClockAndReset
user_115807620
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3
1
98
chisel
How to create a array/vec of Chisel modules
user_56671580
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2
1
1255
chisel
Does the Chisel/FIRRTL toolchain do boolean expression optimization?
user_1247040
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3
1
61
chisel
Printing UInt and SInt values in CHISEL
user_56671580
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2
1
380
chisel
Chisel3 REPL peek value is correct but expect fails in test
user_32601990
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3
1
152
digital-logic chisel fpga
How to test modules with bundle/vec input?
user_32601990
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2
2
197
digital-logic chisel
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