The following Verilog source code was logically synthesized with Quartus II 13.0 sp1.
module dmem (input clk, we,
input [31: 0] a, wd,
output [31: 0] rd);
reg [31: 0] RAM [63: 0];
assign rd = RAM [a [31: 2]]; // word aligned
always @ (posedge clk)
if (we)
RAM [a [31: 2]] [25] <= wd;
endmodule
Then, the following warning was issued. In addition, logic synthesis was successful.
Warning (21074): Design contains 26 input pin (s) that do not drive logic
Warning (15610): No output dependent on input pin "a [0]"
Warning (15610): No output dependent on input pin "a [1]"
Warning (15610): No output dependent on input pin "a [8]"
Warning (15610): No output dependent on input pin "a [9]"
Warning (15610): No output dependent on input pin "a [10]"
Warning (15610): No output dependent on input pin "a [11]"
Warning (15610): No output dependent on input pin "a [12]"
Warning (15610): No output dependent on input pin "a [13]"
Warning (15610): No output dependent on input pin "a [14]"
Warning (15610): No output dependent on input pin "a [15]"
Warning (15610): No output dependent on input pin "a [16]"
Warning (15610): No output dependent on input pin "a [17]"
Warning (15610): No output dependent on input pin "a [18]"
Warning (15610): No output dependent on input pin "a [19]"
Warning (15610): No output dependent on input pin "a [20]"
Warning (15610): No output dependent on input pin "a [21]"
Warning (15610): No output dependent on input pin "a [22]"
Warning (15610): No output dependent on input pin "a [23]"
Warning (15610): No output dependent on input pin "a [24]"
Warning (15610): No output dependent on input pin "a [25]"
Warning (15610): No output dependent on input pin "a [26]"
Warning (15610): No output dependent on input pin "a [27]"
Warning (15610): No output dependent on input pin "a [28]"
Warning (15610): No output dependent on input pin "a [29]"
Warning (15610): No output dependent on input pin "a [30]"
Warning (15610): No output dependent on input pin "a [31]"
I don't understand why "a [2]" to "a [7]" are not No output dependent on input pin. Please tell me the reason.