"Late-forwarding" is mentioned in "Arm Neoverse E1 Core Software Optimization Guide" (as well as in their optimization guides for some other CPU models):
| Instruction Group | Instructions | Exec Latency | Exec Throughput | Notes |
|---|---|---|---|---|
| Multiply accumulate (32-bit) | MADD, MSUB | 3 (2) | 1 | 2 |
| Multiply accumulate (64-bit) | MADD, MSUB | 5 (4) | 1/3 | 2 |
(2) Multiply-accumulate pipelines support late-forwarding of accumulate operands from similar μOPs, allowing a typical sequence of multiply-accumulate μOPs to issue one every N cycles (accumulate latency N shown in parentheses).
What does the term "late-forwarding" mean? What sequence of instructions would be subject to late-forwarding (counter-example would also be helpful)?