How to simulate write-through cache

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I learned the cache write-back and write-through strategy. I want to test the impact of different strategies on program IPC. But the emulator I used before was gem5. I just learned from the official mailing list that gem5 does not implement the write-through strategy. Does qemu have the option to set write-back and write-through strategy. I want to test spec 2006. So can qemu be realized? Or are there other mature simulators that can help me?

1 Answers

QEMU does not model caches at all, so you cannot use it to look at the performance of software in the way you are hoping to do. (In general, trying to estimate performance by running code on a software model is tricky at best, because the behaviour of software models is often significantly different from the behaviour of real hardware, especially for modern hardware which is significantly out-of-order, speculative and microarchitecturally complex. There are a lot of pitfalls for the unwary.)

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