Checksum inside Altera FPGA .jic file

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I'm modifying a firmware file (.jic) JTAG Indirect Configuration File with a small algorithm, but changing data inside the file makes it unusable because there is a checksum somewhere in the file that has to be updated.

I need to find where is a checksum inside .jic file and decipher which algorithm is used (crc32, etc).

The bits on each byte are reversed and I inspected the normal and the reversed bit file with no success.

Does someone know or is there a way to find out where are is the checksum data inside the .jic file?

3 Answers

You need to generate a .rpd file. This data will be loaded into the FPGA at power-up. This is what you will see if you read flash memory byte-by-byte after loading .jic.

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