x86

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Can x86 reorder a narrow store with a wider load that fully contains it?
user_19004440
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12
2
1192
x86-64 x86 assembly locking multithreading
How to ensure that RDTSC is accurate?
user_6504920
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4
1
1576
cpuid rdtsc x86-64 x86
what is fs:[register+value] meaning in assembly?
user_36713250
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4
1
12694
nasm x86 assembly windows
Who loads the BIOS and the memory map during boot-up
user_14348370
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11
1
10659
bios boot memory-mapping x86 memory
Why is protected mode needed in addition to compatibility mode in Intel x86 64 bit CPUs?
user_31476530
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8
1
1811
protected-mode x86-64 x86 cpu
crash in irq handler in qemu: trying to execute code outside RAM or ROM
user_17453870
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4
1
1449
qemu kernel x86 assembly
What are the "missing" spaces on the stack used for?
user_9624600
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4
1
118
exploit disassembly x86 assembly c
HLT instruction causes General Protection Fault in QEMU
user_15881630
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7
2
925
qemu x86 assembly
When should we use prefetch?
user_11051780
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10
6
8140
arm prefetch x86 performance
Are there in x86 any instructions to accelerate SHA (SHA1/2/256/512) encoding?
user_15580370
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27
4
15590
sha cryptography x86 c c++
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