x86-64

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Why is the segfault address NULL when accessing memory that has any of the 16 most significant bits set?
user_23827290
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445
general-protection-fault x86-64 assembly segmentation-fault linux
Why did Intel remove the 16-byte branch target alignment Coding Rule from the Optimization Reference Manual?
user_46035070
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2
0
131
micro-architecture x86-64 micro-optimization intel x86
Cannot use call instruction with a name of a function when running on a different core
user_120103250
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2
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58
apic x86-64 x86 assembly linker
why non-pic code can't be totally ASLR using run-time fixups?
user_133518900
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2
2
266
position-independent-code aslr x86-64 elf linux
GAS aarch64 syntax to get .ascii string length
user_27669080
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3
1
716
arm64 x86-64 gnu-assembler clang assembly
8 Bit LERP with SSE
user_14427670
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3
1
327
lerp intrinsics x86-64 simd sse
When to use a certain calling convention
user_6511740
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2
1
439
x86-64 calling-convention micro-optimization x86 assembly
Unexpected assembly output when passing a structure by value
user_139121320
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4
0
121
x86-64 calling-convention assembly c
How to prevent gcc optimization breaking rep movsb code?
user_72751140
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5
1
547
x86-64 inline-assembly gcc optimization c
Haswell AVX/FMA latencies tested 1 cycle slower than Intel's guide says
user_92411380
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2
1
273
avx x86-64 intel cpu-architecture performance
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