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memory-segmentation
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Is it possible to access 4GB memory in v86 mode through the iret instruction?
user_16242278
0
•
asked Feb 18, 2022
2
0
57
x86-16
memory-segmentation
x86
assembly
Will an implicit stack switch occur when switching from compatibility mode to 64-bit mode at the same privilege level?
user_16242278
0
•
asked Feb 10, 2022
2
3
87
memory-segmentation
x86-64
stack-memory
assembly
MASM string instructions - segment register override on preceding LEA in real mode?
Claus_17897318
0
•
asked Jan 10, 2022
2
2
233
masm
x86-16
memory-segmentation
assembly
How is an instruction executed in a flat memory model, when both the instruction and the accessed data are located in the same page in memory?
user_4463557
0
•
asked Dec 3, 2021
2
0
111
memory-segmentation
intel
x86
assembly
memory-management
In 32-bit mode without paging, how to calculate the physical address?
user_13484358
0
•
asked Nov 30, 2021
2
1
184
memory-segmentation
memory-address
x86
assembly
Why exactly is "Segmentation Fault " still a thing in C
user_8199745
0
•
asked Nov 7, 2021
3
1
221
memory-segmentation
x86-64
operating-system
segmentation-fault
c
Is %gs caller- or callee-save for the System V AMD64 ABI?
user_255577
0
•
asked Aug 10, 2021
2
1
65
memory-segmentation
abi
x86-64
calling-convention
assembly
How to wraparound in the 64KB code segment in a program that stitches itself to its own tail, ad infinitum?
user_3144770
0
•
asked Aug 8, 2021
3
1
107
x86-16
infinite
memory-segmentation
x86
assembly
Is there a convention for how Global Descriptor Table entries should be laid out?
user_1784508
0
•
asked Jul 26, 2021
2
1
147
gdt
memory-segmentation
osdev
kernel
x86
Is the address checked by the memory alignment check mechanism a effective address, a linear address or a physical address?
user_16242278
0
•
asked Jun 16, 2021
7
1
299
memory-segmentation
osdev
memory-alignment
x86
assembly
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