Makefile: No rule to make target /hello.obj

Question

SRCDIR=src
OUTDIR=bin

CXX=g++
CXXFLAGS=-Wall -Wextra -O0 -g -MD -fmodules-ts

rwildcard=$(wildcard $1$2) $(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2))
CODEFILES := $(call rwildcard,src,*.cpp)

OBJFILES := $(subst $(SRCDIR),,$(CODEFILES:%.cpp=%.obj))

$(info $(OBJFILES))

all: $(OBJFILES)
    $(CXX) -o $@ $^

%.obj:%.cpp
    $(CXX) $(CXXFLAGS) -c -o $(OUTDIR)/$@ $(SRCDIR)/$<

Outputs:

/hello.obj /main.obj /some/bye.obj
make: *** No rule to make target '/hello.obj', needed by 'all'.  Stop.

It's my first time using a Makefile and I'm stuck on this problem. What did I do wrong?

PS: This is on Windows.

EDIT:

$(info $(CODEFILES))

gives:

PS F:\CLionFiles\modules> make
 src/hello.cpp src/main.cpp     src/some/bye.cpp
make: *** No rule to make target '/hello.obj', needed by 'all'.  Stop

user_8075540 · Answer

The elements of CODEFILES all start with src/. When you define OBJFILES with subst, you strip off SRCDIR (which is src) which leaves the resultant file paths starting with /.

You want to put the object files in OUTDIR. So, you need to do

OBJFILES := $(subst $(SRCDIR),$(OUTDIR),$(CODEFILES:%.cpp=%.obj))

You then need to change the final recipe to

$(OUTDIR)/%.obj: $(SRCDIR)/%.cpp
    $(CXX) $(CXXFLAGS) -c -o $@ $<

Makefile: No rule to make target /hello.obj

1 Answers