I know that there are minimum uniform buffer and shader storage minimum alignments, but I was wondering if there were minimum alignment for vertices(anything that is read from the input assembler) and indices. Also do the staging buffers need to have an alignment for indices and vertices? How about the copy operations from staging buffer to a device-local buffer and vice versa?
1 Answers
vkCmdBindIndexBuffer's documentation states that offset "must be a multiple of the type indicated by indexType".
The vertex buffer binding functions have similar alignment requirements based on the formats used for them, but they are specified in a more unusual way (and not in the documentation for the function).
There is a section in the specification on how the address for a specific attribute is computed. The wording here puts for a set of de-facto requirements on the pOffsets parameter to vkCmdBindVertexBuffers and similar functions.
The rules boil down to this: you have to specify offsets (and other fields) such that the eventual address computed for each attribute is not misaligned, relative to the format for that attribute. Packed formats have to be multiples of their pack size, while non-packed formats have to be multiples of their component sizes. So while VK_FORMAT_A8B8G8R8_UNORM_PACK32 must be aligned to 4 bytes, VK_FORMAT_R8G8B8A8_UNORM can handle byte-alignment.
Though personally, I wouldn't test the latter.
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