I only find that IBM tried to support it in Blue Gen/Q computing system, but after that, it seems to be given up. While, hardware transaction memory is still supported in Power 8, like tsuspend instruction, and intel also made their TSX instructions.
So, why it seems no other efforts to make tls in current cpu design but only stays in academic researches?
Any guys can give help, thanks :)
TSX is unfortunately rarely used by applications. Partially because mainstream libraries and language implementations does not use it or does not provide a transactional memory features. There is also a small support in compiler built-ins and not all processor implement this (also it starts to become mainstream). This is also because of the lake of knowledge of developers on the existence of (hardware) TSX too (and sadly more generally often a lack of knowledge in parallel computing methods/algorithms).
Moreover, there was several important vulnerabilities few years ago related to TSX speculation mainly on Intel hardware (ZombieLoad 1&2 and previous side-channel timing attack). People could disable this feature for security reasons. Patches to fix such vulnerabilities introduces overheads in applications that does not use this feature.
When it comes to the hardware support, this is far from being great. Indeed, AFAIK, Intel Comet Lake and Ice Lake CPU do not support TSX anymore (but a new transactional memory instruction has been added in Sapphire Rapids processors), AMD never did and POWER 10 removed they similar feature implemented in previous processor versions (possibly due to the reasons mention above). The restricted transactional memory (RTM) of TSX is not backward compatible. Having to consider only few specific supported processors in a x86/x64 code is tricky (a fallback solution needs to be implemented). Not to mention there is some difference in the several transactional memory instruction sets including restrictions.
Using valuable transistors and processor engineers time to develop hardware units barely used by applications is not very efficient (unless massively used one use it including benchmarks). However, people do not use a hardware features if this does not significantly worth it, at least performance wise (especially a non-portable low-level ones which introduce an additional maintainability overhead).
