Why "Implication" and "if–else" constraints showing different results?

user_2613802 0
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Why am I getting different results when I am using if-else and implication constraints?

As these two are considered the same, I think I should not get any difference. In if-else case, last item is not constraints.

class consMultiline;
  rand int arr[$];
  rand int arrQ[$];


  constraint c_iterate {
    arr.size inside {[4:4]};
    foreach(arr[i]) {
       (i < arr.size - 1) -> arr[i+1] > arr[i];
       arr[i] inside {[1:100]};
    }
  }

  constraint c_iterateQ {
    arrQ.size inside {[4:4]};
    foreach(arrQ[i]) {
       if( i < (arrQ.size -1)) {
           arrQ[i+1] > arrQ[i];
           arrQ[i] inside {[1:100]};
       }
    }
  }     
endclass

module tb;

   initial begin
     consMultiline cMult = new;
     for (int i = 0; i < 1; i++) begin
         cMult.randomize();
          $display ("%t %M: Arr=|%p| ", $time, cMult.arr);
          $display ("%t %M: ArrQ=|%p| ", $time, cMult.arrQ);
     end
   end
 
endmodule

OutPut:

             0 tb.unmblk1.unmblk1: Arr=|'{1, 7, 23, 47}| 
             0 tb.unmblk1.unmblk1: ArrQ=|'{23, 28, 67, 1364678739}|

I want to know what is there that I am missing and getting different results.

verification system-verilog
1 Answers

The logic is different between your two constraints. To make your if-else match the implication, change:

   foreach(arrQ[i]) {
       if( i < (arrQ.size -1)) {
           arrQ[i+1] > arrQ[i];
           arrQ[i] inside {[1:100]};
       }
   }

to:

   foreach(arrQ[i]) {
       if( i < (arrQ.size -1)) {
           arrQ[i+1] > arrQ[i];
       }
       arrQ[i] inside {[1:100]};
   }
user_1977580
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