What's the point of having a virtual address that's larger than the effective address?

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I'm familiar with virtual memory and the idea of virtual versus physical addresses. I'm also familiar with the multi-level page translation scheme. One thing that I newly came across though was the idea of an "effective" address. Looking into it, its used to index into a segmented address space, and you need to convert it to a virtual address in the linearized address space. On the surface this makes sense to me, but I then found a diagram like this:

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I don't really get what the point of going from a 64-bit EAddr to a 80-bit VAddr is. You can have 2^36 unique VSIDs since the ESID is 36 bits. That combined with the 2^16 different Page Index values means you only really have access to 2^52 different Virtual Page Numbers, not 2^68 like you'd expect from an 80-bit VAddr.

So why does this system bother to do any of this? Moving around 80 bits when you only use 60 sounds like a waste of wiring. Is there something I'm missing? Am I misunderstanding how segments work?

powerpc virtual-memory cpu-architecture
1 Answers

The "virtual address" here has a different meaning than is commonly understood in the virtual / physical sense.

It is specific to the Hash Page Table (HPT) MMU that PowerPC uses for address translation. A single hash table structure is used globally to translate addresses. Different memory contexts (e.g. processes) use individual segment tables so they will generate unique virtual addresses. The virtual address is used as the key to the lookup translations in the shared hash page table. The virtual address needs to be larger than the effective address range so that different contexts can have unique translations in the hash table.

For more details, have a look at the POWER ISA. In particular Book III: Chapter V Storage Control.

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