Issues with Nucleo-H743ZI2 board

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The clock configurator in STM32CubeMX does not allow the PLL divider DIVP1 frequency to exceed 300MHz so it is impossible to use it to achieve the board's maximum of 480MHz. To do this you must go into the code for the configurator and manually change the multipliers. Is this confusion on my part or an error with the data provided by ST for the board?

Checking CPU performance singing a hardcoded assembler timing loop the subtract and branch instructions of the timing circuit take two clock cycles. On my Nucleo-H723ZG board these two take a total of one cycle. Is DUAL ISSUING not available on H743?

Once again in the STM32CubeMX in the System RCC section Master_Clock_Output_1 is highlighted in RED. (Conflict with: USB_OTG_FS: Activate_SOF). What is this all about?

stm32
1 Answers

You need to have the correct voltage scale (VOS) which affects the maximum clock directly. To clock this device at 480MHz. Voltage configuration Clock tree

As for your pin conflict - the MCO pin is a clock output to use for clocking external devices. Pins in the STM32 chip can be multiplexed such that they can serve multiple functions, such as ADC1_CH4 GPIO_OUT etc... You have a conflict that 1 pin is trying to facilitate 2 functionalities, and such you have a conflict. rearrange the functionality or pin to fix the conflict.

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