I'm having a problem with a simple periodic Clock function running on TI's AM572x EVM (main A15 core). The Clock is set up to use any available timer (Timer_ANY), which I assume is either TIMER2 or TIMER10 as I've seen them associated with A15_0 in a GEL script. When I pause and resume emulation with the XDX200 debugger (with CCS9), I'm seeing the Clock Swi executing many more times than it should, preceded by the Hwi posting the Clock Swi as shown here:
Many Hwi executions following unpause
Many Swi executions following many Hwi executions
I've checked the TIOCP_CFG EMUFREE bits for TIMER2 and TIMER10 and they're set to 0, indicating that the timers should be frozen in emulation mode. However, I'm also always seeing 0 in the TCRR register for both timers, which I understand to be the counter register. This suggests that these timers aren't actually counting at all, and that a different timer is being used for the TI-RTOS Clock, but I'm not sure what timer that would be or how I would configure it to freeze during a debugger pause.
Does anyone have any insight into how to properly freeze TI-RTOS Clocks while debugging?