How to subtract two positive IEEE-754 numbers?

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So I am a bit helpless. I think I understand how to do an addition on IEEE-754 numbers, but I have big problems with subtraction. I have the feeling, that my thoughts are correct, but I want to verify with you guys.

So we have the following two IEEE-754 numbers:

x: 0 1000 0010 100 1000 0000 0000 0000 0000 
y: 0 1000 0011 010 1001 0000 0000 0000 0000

Since we have to positive numbers and we want to subtract them, my idea was to take y, invert the mantissa and calculate

x+(-y)

A tutor told me, that that's incorrect, and I have to keep the numbers positive and just subtract them. Why and how he did not tell me.

Can somebody tell me what is the right way to do this?

My thoughts for doing it the x-y way:

  1. extend the exponent from x to 1000 0011
  2. shift the mantissa of x by 1
  3. subtract the two numbers the normal way
2 Answers

OP's 1-2-3 idea is mostly on track, but may have missed the implied bit.

1 Account for the implied bit.

   s eeee eeee mmm mmmm mmmm mmmm mmmm mmmm
x: 0 1000 0010 100 1000 0000 0000 0000 0000 
y: 0 1000 0011 010 1001 0000 0000 0000 0000

   s eeee eeee immm mmmm mmmm mmmm mmmm mmmm
x: 0 1000 0010 1100 1000 0000 0000 0000 0000 
y: 0 1000 0011 1010 1001 0000 0000 0000 0000

2 Adjust the smaller, in magnitude, number to form a common exponent. (increment expo, shift "mantissa")

   s eeee eeee immm mmmm mmmm mmmm mmmm mmmm extra bits
x: 0 1000 0011  110 0100 0000 0000 0000 0000 0 
y: 0 1000 0011 1010 1001 0000 0000 0000 0000

2.5 If signs bit differ, flip the 2nd and perform an add. Yet since the same in this case, not much to do.

3 Subtract smaller from larger.

   s eeee eeee immm mmmm mmmm mmmm mmmm mmmm
y: 0 1000 0011 1010 1001 0000 0000 0000 0000
x: 0 1000 0011  110 0100 0000 0000 0000 0000 0 
d: 0 1000 0011 0100 0101 0000 0000 0000 0000 0

4 Adjust so MSbit is the implied 1 (Shift "mantissa", decrement exponent).

   s eeee eeee immm mmmm mmmm mmmm mmmm mmmm
d: 0 1000 0010 1000 1010 0000 0000 0000 0000

5 Account for reversed subtraction. (Flip sign)

   s eeee eeee immm mmmm mmmm mmmm mmmm mmmm
d: 1 1000 0010 1000 1010 0000 0000 0000 0000

6 Round - no value change in this case.

   s eeee eeee immm mmmm mmmm mmmm mmmm mmmm
d: 1 1000 0010 1000 1010 0000 0000 0000 0000

7 Remove implied bit to form encoded result.

   s eeee eeee mmm mmmm mmmm mmmm mmmm mmmm
d: 1 1000 0010 000 1010 0000 0000 0000 0000

Details of not-a-number, sub-normals, overflow, infinity and rounding left out for brevity.


Note IEEE-754 uses "significant", not "mantissa".

All the methods that produce the correct results are correct. Rounding might be easier to handle by subtracting smaller absolute value from larger and adjusting the sign bits accordingly. Also working with positive numbers only makes it slightly more easier to handle the (optional) implicit one at 1<<23. For negative values the digit would need to be 0xff800000. Other special cases would emerge for negative denormals as well.

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