Reg of Vec of Valid(Vec

Question

I am continually getting an error due to the use of different sized Vecs. Is there a way I could implement this so that b, c, and d would all take just their respective # of Vec elements from a.

val a = Reg(Vec(10, Valid(Vec(32, UInt(8.W)))))
val b = Reg(Vec(10, Valid(Vec(16, UInt(8.W)))))
val c = Reg(Vec(8, Valid(Vec(24, UInt(8.W)))))
val d = Reg(Vec(7, Valid(Vec(32, UInt(8.W)))))

for (i <- 0 to 10) {
  b(i).bits := a(i).bits
}
for (i <- 0 to 8) {
  c(i).bits := a(i).bits
}
for (i <- 0 to 7) {
  d(i).bits := a(i).bits
}

Here is the error message I am receiving.

Connection between sink (UInt<8>[16](Reg in file)) and source (UInt<8>[32](Reg in file)) failed @: Sink and Source are different length Vecs.

user_2483329 · Answer

You can use the slice method to take a portion of any Scala Seq (Chisel's Vec extends Seq):

val a = Reg(Vec(10, Valid(Vec(32, UInt(8.W)))))
val b = Reg(Vec(10, Valid(Vec(16, UInt(8.W)))))

for (i <- 0 until 10) {
  b(i).bits := a(i).bits.slice(0, 16)
}

This all is very index heavy though, relying on knowing the sizes of your Vecs, we could use the Seq method zip which allows you to iterate on corresponding elements in two Seqs. If one is longer than the other, it just truncates to the shorter one. The below is functionally identical to the for loop with the slice:

for ((bb, aa) <- b zip a) { // I'm using infix notation: b zip a == b.zip(a)
  for ((x, y) <- bb.bits zip aa.bits) {
    x := y
  }
}

Note the lack of any indices, this just works no matter the size, so we could use this in a reusable function:

def nestedConnect(x: Vec[Valid[Vec[UInt]]], y: Vec[Valid[Vec[UInt]]]): Unit = {
  for ((xx, yy) <- x zip y) {
    for ((l, r) <- xx.bits zip yy.bits) {
      l := r
    }
  }
}

We can then do all of your connects by using this function:

nestedConnect(b, a)
nestedConnect(c, a)
nestedConnect(d, a)

Executable example showing that this works: https://scastie.scala-lang.org/SFh1PratTCWhxHc55VGeHg

Reg of Vec of Valid(Vec

1 Answers