I am using CUDA with half floats, or __half as they are called in CUDA.
What is the half-float equivalent of FLT_MAX?
The cuda_fp16.h header does not seem to have a macro that resembles this.
$ grep MAX /usr/local/cuda-11.1/targets/x86_64-linux/include/cuda_fp16.h
$
I needed similar macros once before (not in CUDA though) and found some constants in this C++ fp16 proposal for short floats.
The "S" prefix comes from the proposed "short" in short float.
// Smallest positive short float
#define SFLT_MIN 5.96046448e-08
// Smallest positive
// normalized short float
#define SFLT_NRM_MIN 6.10351562e-05
// Largest positive short float
#define SFLT_MAX 65504.0
// Smallest positive e
// for which (1.0 + e) != (1.0)
#define SFLT_EPSILON 0.00097656
// Number of digits in mantissa
// (significand + hidden leading 1)
#define SFLT_MANT_DIG 11
// Number of base 10 digits that
// can be represented without change
#define SFLT_DIG 2
// Base of the exponent
#define SFLT_RADIX 2
// Minimum negative integer such that
// HALF_RADIX raised to the power of
// one less than that integer is a
// normalized short float
#define SFLT_MIN_EXP -13
// Maximum positive integer such that
// HALF_RADIX raised to the power of
// one less than that integer is a
// normalized short float
#define SFLT_MAX_EXP 16
// Minimum positive integer such
// that 10 raised to that power is
// a normalized short float
#define SFLT_MIN_10_EXP -4
// Maximum positive integer such
// that 10 raised to that power is
// a normalized short float
#define SFLT_MAX_10_EXP 4
You can also find similar constants from the half.hpp library.
NOTE: I am not sure what the CUDA compiler supports regarding fp16 literals. So you might need to convert these to hex reinterpret the bits as __half (NOTE: note convert/cast).
None of this is ideal and if someone can point you to some cuda_fp16_limits.h file, then favor that answer over this one.