I'm using libsimdpp to write vectorized code. It seems that I cannot find a way to move less than all the lanes from memory or from a register to another register.
For example, with the _mm_move_sd or _mm_move_ss intrinsics (movsd or movss opcodes) one can copy the lowest one or two lanes between registers, leaving the other lanes intact.
How do you do the same with libsimdpp?
I am unfamiliar with the libsimdpp library, but as far as I can see you can use simdpp::shuffle2x2, with suitable permutation indices, as an alternative to _mm_move_sd. From the file https://github.com/p12tic/libsimdpp/blob/master/simdpp/detail/insn/shuffle2x2.h, we can see that in this way _mm_shuffle_pd or _mm_blend_pd is used, depending on the permutation indices which are chosen. These Intel intrinsics can be used as an alternative to _mm_move_sd.
From the manual page it seems that you have to choose the permutation indices s0 = 2, and s1 = 1 to emulate _mm_move_sd. This corresponds to
line 156 and 157 of shuffle2x2.h, which is: if (s0 == 2 && s1 == 1) {return _mm_blend_pd(b.native(), a.native(), 0x2);}.
An alternative for _mm_move_ss is _mm_blend_ps, with a suitable mask. With simdpp::shuffle4x2 the libsimdpp library chooses _mm_blend_ps on the x86 architecture, if the following is true for the permutation indices (s0==0 || s0==4) && (s1==1 || s1==5) && (s2==2 || s2==6) && (s3==3 || s3==7), see sse_float32_4x2.h, line 40 and 155.
Note that, for example, GCC may compile both _mm_blend_ps(a, b, 1), and _mm_move_ss to the movss instruction. See this Godbolt link. So, with libsimdpp and a smart compiler, indeed it is possible to generate the movss opcode.
But note that only _mm_blend_pd(a, b, 1); is recognized by GCC, not
_mm_blend_pd(a, b, 2);, which is produced by libsimdpp.
Note that the blendpd/ps instruction with register operands has better throughput than movsd/ss, on Intel CPUs since the Intel Haswell processor, as Peter Cordes remarked in his comment.
