I am curious about the processing of DMA(PEX 8733) driver transfer, and using kzalloc to get a piece of buff for observing a running DMA descriptor table.
It is according to DMA spec, the descriptor format is like: descriptor format
When I start my observation, the result is like expected example 1 (The order is dw0, dw1, dw2, dw3.) or expected example 2.
expected example 2:
DMA Descriptor Entry 0, (80003c66, 3890, 74ea046c, fff4028e)
DMA Descriptor Entry 1, (c000042e, 3890, 74ea0048, fff4024e)
After a while(about 2 hours), the result shows: unexpected example 1 or unexpected example 2
unexpected example 2:
DMA Descriptor Entry 0, (80007c0e, ffff3890, 65da046e, fffc04ee)
DMA Descriptor Entry 1, (c000042e, ffff3890, 65da0040, fffc00c0)
I am not able to realize the dw1 have 0xffff in source address' high byte.
Do I misunderstand or miss something about DMA descriptor?
I am not sure the potential issue(Additional messages) which is related to the high src addr, but it appears when DMA runs a while.
Additional messages:
DMAR: DRHD: handling fault status reg 402
DMAR: DMAR: [DMA Read] Request device [01:00.2] fault addr fffc0000
DMAR: [fault reason 06] PTE Read access is not set