I am new to VHDL. There is a line, given below:
constant TIME_DELTA : time := 100 ns;
What is this word time in the line? Is it data type just like integer? As I searched VHDL help around internet, many people use it, but no body discusses any thing about it. I searched books as well, but no use.
Can some body explain how is this keyword time is used?
Time is a Predefined physical types
IEEE Std 1076™-2008 :
5.2.4.2 Predefined physical types
The only predefined physical type is type TIME. The range of TIME is implementation dependent, but it is guaranteed to include the range –2147483647 to +2147483647. It is defined with an ascending range. All specifications of delays and pulse rejection limits shall be of type TIME. The declaration of type TIME appears in package STANDARD in Clause 16.
By default, the primary unit of type TIME (1 fs) is the resolution limit for type TIME. Any TIME value whose absolute value is smaller than this limit is truncated to zero (0) time units. An implementation may allow a given elaboration of a model (see Clause 14) to select a secondary unit of type TIME as the resolution limit. Furthermore, an implementation may restrict the precision of the representation of values of type TIME and the results of expressions of type TIME, provided that values as small as the resolution limit are representable within those restrictions. It is an error if a given unit of type TIME appears anywhere within the design hierarchy defining a model to be elaborated, and if the position number of that unit is less than that of the secondary unit selected as the resolution limit for type TIME during the elaboration of the model, unless that unit is part of a physical literal whose abstract literal is either the integer value zero or the floating-point value zero.
I understand it, on the simulator side, as an integer value which represents the time with a resolution of the primary limit (1fs for example).
It can be expressed in your code with real values representation with bigger time with a bigger timescale :
-- time1 and time2 are equal
signal time1 : time := 1000.125 ms;
signal time2 : time := 1000125 us;
time is just a datatype. In your case, constant TIME_DELTA : time := 100 ns; could be used as a delay in a signal assignment, for example:
architecture some_arch of some_ent is
constant TIME_DELTA: time := 100 ns;
begin
dclk <= clk after TIME_DELTA;
end some_arch;