After mucking about with the FPGA, I became had a near heart attack while assigning pins.
There are any number of pins on an FPGA, and some IDEs are helpful and give you access to the package information ranging from what pins there are, what IO bank they are a part of and what the polarity is. After extensively digging around on the manufacturer's and competitors' websites, reading through tutorials, information sheets, guides etc. I was still none the wiser. After some more mucking about, I think I understand what this means, but hope someone can clarify this for me and others like myself who might be just as confused.
On Polarity: Does the polarity indicate in what state the input must be in (IE: True or complementary)? or does it indicate the polarity that the input is received in?
Does this mean that an additional resources will be required by the FPGA to convert the input/output to the desired state? Or does this mean that I have the inputs coming in at the correct polarity for the FPGA to register the inputs correctly?
Otherwise, I am completely confused by the concept of polarity as it relates to the IO on an FPGA. Is this something I really need to be concerned about?
On IO banks: are IO banks grouped according to which part of the FPGA they link into? If this is the case, I'd assume that IO Banks that are grouped together operate faster together. Is the consequence of distributing inputs to the FPGA across disparate IOs result in the consumption of resources and sub-optimal performance, or is this a big problem that prevents proper operation?
I'm not having much luck on finding any literature that explains this. The time I spent in a class in 2014 was helpful for breaking the ice with programming FPGAs but the course had many deficiencies and discrepancies for learning goals, and there wasn't much else available. I'm hoping this question will help others as well.