Make file warning, overriding commands for target

user_944844 0
Viewed 54342

As part of the makefile i'd like to produce either a debug or release version of the target.

Functionally, everything is working, however, i am getting warnings when running make

 12 SRC := $(shell echo src/*.cpp)
 13 SRC += $(shell echo $(TEST_ROOT)/*.cpp)
 14 
 15 D_OBJECTS = $(SRC:.cpp=.o)       # same objects will need to be built differently
 16 R_OBJECTS = $(SRC:.cpp=.o)       # same objects will need to be built differently

 22 all: $(TARGET)
 23 
 25 $(TARGET): $(D_OBJECTS)
 26   $(CC) $(D_OBJECTS) -o $(TARGET)
 27 
 28 $(D_OBJECTS) : %.o: %.cpp                     # ----- run with debug flags 
 29   $(CC) $(COMMON_FLAGS) $(DEBUG_FLAGS) -c $< -o $@
 30 
 31 release: $(R_OBJECTS)
 32   $(CC) $(R_OBJECTS) -o $(TARGET)
 33 
 34 $(R_OBJECTS) : %.o: %.cpp                     # ----- run with release flags
 35   $(CC) $(COMMON_FLAGS) $(RELEASE_FLAGS) -c $< -o $@

When i make i get debug version, when i make release i get release version.

But i also get warnings:

Makefile:35: warning: overriding commands for target `src/Timer.o'
Makefile:29: warning: ignoring old commands for target `src/Timer.o'
Makefile:35: warning: overriding commands for target `test/TimerTest.o'
Makefile:29: warning: ignoring old commands for target `test/TimerTest.o'

With this 2 questions:

  1. Any way to ignore the warnings
  2. Am i doing things right? What changes are needed?
warnings makefile
4 Answers

To avoid including the same file many times, you can use a C-style header 'directive':

ifeq ($(_MY_MAKEFILE_),)
_MY_MAKEFILE_ := defined

...

endif
  • ifeq here is just saying "is the value empty"
  • it's possible something similar can be done with ifndef but I got this working first
  • the value "defined" is just anything that isn't blank
user_6213160

I complied my own make and commented out section where those warning are printed. Works like a charm. make v4.2, read.c, around line 2114

user_102257790
Related