Execute Makefile rule only once

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I have a Makefile rule like the following:

%.b : %.a
    [run some commands...]

I'd like to rewrite my Makefile such that all conversions from %.a to %.b are handled by a single execution of the commands rather than once for every file.

I've tried the following:

%.b : someDummyFile

someDummyFile : 
    [run some commands]

The problem is that the rule for creating someDummyFile gets executed even when the first rule doesn't request it, leading to undesirable behavior. I'm guessing that rules without dependencies get executed all the time even when their targets are not used by some other rule?

What am I missing here?


In trying to debug this problem, I removed all references to the second rule. For instance, I insert the following rule into an existing Makefile, why does it get executed even when no other rules make reference to it?

HELLOWORLD :
    echo "# HELLO WORLD! THE NEXT LINE WILL TRIGGER AN ERROR"
    DFASDA
1 Answers
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