Passing C/C++ #defines to makefile

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I develop C/C++ using the Eclipse IDE. Eclipse also generates a makefile which I don't want to edit as it will simply be overwritten.

I want to use that makefile for nightly build within Hudson.

How do I pass #defines which are made in the project file of the IDE to the makefile ? (and why doesn't Eclipse already include them in the generated makefile?)

I actually had this figured out once, then accidentally overwrote it :-( But at least I know that it can be done...

4 Answers

If you are running make from the command line, use

make CPPFLAGS=-DFOO

which will add -DFOO to all compilations. See also CFLAGS, CXXFLAGS, LDFLAGS in the make manual.

You could write a small program to include the headers and write a makefile fragment which you include in the main makefile (requires GNU make).

This is a fairly ugly solution that requires a fair amount of hand hackery. More elegant would be to parse the project file and write the makefile fragment.

For GCC use -D define.

OP commented below that he wants to pass the define into make and have it pass it on to GCC.

Make does not allow this. Typically you just add another make rule to add defines. For instance 'make release' vs 'make debug'. As the makefile creator you make the two rules and have the defines right in the make file. Now if Eclipse is not putting the defines into the makefile for you, I would say Eclipse is broken.

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