Override target in makefile to add more commands?

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At work we use a common makefile that other makefiles include (via the include statement) and it has a generic "clean" target that kills some common files. I want to add on to that target in my new makefile so I can delete some specific files, but if I add a clean target in my makefile, it just overrides the old one.

I know I can just make a new target with a new name and have it call clean, and then do other stuff, but for sake of consistency I'd like to be able to just call make clean and have it do everything.

Is that possible?

makefile
8 Answers

I've found a better solution:

.PHONY: my-extra-clean

clean: my-extra-clean

my-extra-clean:
      rm <whatever-you-want>

include Makefile.common

The key line is clean: my-extra-clean. Ie, you can add dependencies in separate stanzas in different makefiles to add behaviour. my-extra-clean is run as a dependency of the root clean target.

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