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GDB-remote + qemu reports unexpected memory address for static C variable
user_238800
0
•
asked Dec 5, 2020
5
2
433
osdev
qemu
x86
gdb
c
floating point rounding giving different results for 80-bit register and 64-bit double: ill-formed code or gcc/clang bug?
user_19905
0
•
asked Dec 4, 2020
3
1
74
clang++
g++
floating-point
x86
c++
x86 program per instruction profiling
user_1248918
0
•
asked Dec 3, 2020
2
0
62
x86
assembly
profiler
profiling
performance
Extended Inline Assembly in C++: Is it necessary to preserve volatile registers?
user_7789984
0
•
asked Dec 3, 2020
2
1
226
inline-assembly
x86
assembly
c++
illegal instruction: opcode with wrong RegOpcode value
user_10773041
0
•
asked Dec 2, 2020
2
0
215
opcode
disassembly
machine-code
x86
assembly
r/m8 operand being interpreted as r/m32 operand by disassembler
user_11520390
0
•
asked Dec 2, 2020
2
0
76
disassembly
intel
x86
reverse-engineering
assembly
Conditional move zero into register?
user_4539389
0
•
asked Nov 30, 2020
3
1
249
conditional-move
att
x86-64
x86
assembly
Named Address Spaces for MSVC
user_12862673
0
•
asked Nov 30, 2020
2
1
204
cpu-registers
x86
visual-c++
windows
c++
Why adox and adcx don't play well together on Ryzen?
user_14724380
0
•
asked Nov 28, 2020
5
1
211
adx
gmp
amd-processor
x86
cpu-architecture
What is the XOP prefix in an instruction?
user_11520390
0
•
asked Nov 27, 2020
2
0
155
amd-processor
instructions
machine-code
x86
assembly
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